60 lines
1.8 KiB
C
60 lines
1.8 KiB
C
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/*
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* Copyright (c) 2011 The WebRTC project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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#ifndef WEBRTC_MEDIA_BASE_CPUID_H_
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#define WEBRTC_MEDIA_BASE_CPUID_H_
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#include "webrtc/base/constructormagic.h"
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namespace cricket {
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class CpuInfo {
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public:
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// The following flags must match libyuv/cpu_id.h values.
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// Internal flag to indicate cpuid requires initialization.
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static const int kCpuInit = 0x1;
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// These flags are only valid on ARM processors.
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static const int kCpuHasARM = 0x2;
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static const int kCpuHasNEON = 0x4;
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// 0x8 reserved for future ARM flag.
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// These flags are only valid on x86 processors.
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static const int kCpuHasX86 = 0x10;
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static const int kCpuHasSSE2 = 0x20;
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static const int kCpuHasSSSE3 = 0x40;
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static const int kCpuHasSSE41 = 0x80;
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static const int kCpuHasSSE42 = 0x100;
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static const int kCpuHasAVX = 0x200;
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static const int kCpuHasAVX2 = 0x400;
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static const int kCpuHasERMS = 0x800;
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// These flags are only valid on MIPS processors.
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static const int kCpuHasMIPS = 0x1000;
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static const int kCpuHasMIPS_DSP = 0x2000;
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static const int kCpuHasMIPS_DSPR2 = 0x4000;
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// Detect CPU has SSE2 etc.
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static bool TestCpuFlag(int flag);
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// For testing, allow CPU flags to be disabled.
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static void MaskCpuFlagsForTest(int enable_flags);
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private:
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RTC_DISALLOW_IMPLICIT_CONSTRUCTORS(CpuInfo);
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};
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// Detect an Intel Core I5 or better such as 4th generation Macbook Air.
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bool IsCoreIOrBetter();
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} // namespace cricket
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#endif // WEBRTC_MEDIA_BASE_CPUID_H_
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